Eagle 6.5.0 – Schematic capture and printed circuit board design

Eagle Layout Editor is a schematic capture and printed circuit board design package that runs in the X11 application environment.

WHAT’S NEW

Version 6.5.0:

Consistency Checking:

• Added full consistency check of packages to avoid misleading informations used e.g., for DesignLink.
• The inequality of part and element attributes or the absence of part attributes in the appropriate board element is now treated as consistency error (was only an ERC warning up to now).

Design Rule Check:

• Increased max. thickness of the layer stack cores to 8mm.

DIMENSION command:

• Now no snapping to objects on defining the second DIMENSION point is done if Ctrl key pressed.

MEANDER command:

• Now smaller loops are possible if MEANDER is handling a single signal.

Installation:

• When a new EAGLE version is installed, now a backup file of the existing user settings file is created (.eaglerc.sav on Linux and Mac, eaglerc.usr.sav on Windows).
• Default assignment of shortcuts moved from ‘eagle.scr’ to extra script ‘default-assign.scr’ to avoid undesired overwriting. The existing ‘eagleassign.scr’, which contains useful ULP shortcuts for library editing, has been renamed to ‘lbr-assign.scr’.

Miscellaneous:

• Added a ULP eagle-3d.ulp from Simplified Solutions Inc. for a connection to their online service of generating a 3D printing from an EAGLE board.
• Added information about optional grid multiple in the coordinates display.
• Online help PASTE from file: Added a section about behaviour of global settings like design rules etc.
• Removed suppression of drawing preview in control panel if the drawing is already loaded in an editor.
• Changed the header section of GERBER_RS274X in the eagle.def file; replaced the obsolete unit selection code “G70*n” by “%%MOIN*%%n”

Bugfixes:

• Avoid superfluous pinrefs of UL_NET.pinrefs().
• Fixed mirroring of a polygon in signal layers during COPY.
• Fixed setting the radius of MITER in eagle.scr.
• Avoid tab characters in the dialogs of TEXT values (they are not supported).
• Increased the edge approximation accuracy for emulating circles (e.g., for distance calculations).
• Fixed recalculating the bounding rectangle of a drawing after rotating a group with a dimension object.
• Fixed moving the first wire of a polygon to zero length.
• Skipping polygon wires with zero length while loading drawings.
• In the properties dialog of a part now the gate name is displayed always (also if there is only one gate).
• Fixed starting a new ROUTE with an auto-generated airwire on a long wire. Sometimes the dynamical airwire led by mistake to the start segment.
• Fix for variant dialog in schematic: In case of parts of devices without empty technology avoid wrong technology assignment after change in variant dialog.
• Fixed updating files from an older EAGLE version with special characters in a designrule name.
• Avoid two busses with identical name if renamed within the properties dialog.
• Fix for variant dialog in schematic: Proper support for setting the empty technology for a variant.
• Update of attributes after CHANGE PACKAGE/TECHNOLOGY: If attribute values differ from old to new package/technology, they are updated, also if they have been overwritten in schematic and/or board. This fixes an unintended behaviour that was introduced in version 6.3.
• Attribute dialog in board: Allow deletion only for attributes defined only in board or if f/b annotation is off (makes behaviour identical to deletion by command line). Fix for related problem if there are global attributes in schematic additionally.
• Took out OPTIMIZE entry from wire context menu for cases where OPTIMIZE is currently not supported.
• Fix for loss of stored approved DRC errors after saving the changed board without new DRC.
• Fixed drawing of thin arcs with flat caps in Gerber output.
• Fix for inconsistency after REPLACE if a device with several gates at same position is involved. If previous and new gates don’t match by gate names, they are matched by their symbol names.
• Fix for insufficient accuracy of last grid settings.
• Fix for missing data reload after package update in library editor.
• Fixed export of monochrome images for pads/vias. Now the shape is considered depending on layer visibility (distinction inside/outside).
• Fix for crash during conversion of a V5 schematic that worked in V5 but contained some invalid data.
• Installation on OS X 10.8: Fix for wrong file ownership. Files now have root as owner and write access to group. Additionally a check is done to avoid installation on no longer supported OSX versions (earlier than OS X 10.6).
• Added handling of blanks in prefix, instance, part, element, pinref and contactref names if updating files from older versions. As blanks are not supported in V6, they are converted to ‘_’.
• Preview in Control Panel for schematic/boards: Make explicit refresh work (triggered by menu selection or key F5).
• Measurement of signal length in MEANDER with higher precision and indication of overflow (values > ca. 6700 mm).
• Fix for not searchable PDF files printed from MAC version.
• Fixed handling of cutout polygons in the same signal. The cut is done in RATSNEST regardless where the cutout polygon belongs to.
• Fixed setting the current editor grid if changing the drawing type in the library editor (device, package, symbol).
• Autorouter improvement for a track where only a wire split is missing.
• Fix for ‘Expand all’ function for control panel trees (triggered by ‘*’).
• Avoiding unjustified changes of text alignment on labels in a group.
• COPY of net or bus wires: Creation of a new segment for the wire copy if it’s endpoints are apart from the source segment.
• Improved error message for the case of renaming a part/element to a name that already exists, but only in the corresponding drawing of the (consistent) project pair.
• Arbitrary pad shapes: Fix for special case where pad polygon was not recognized.
• Fixed changing technology or package variant of a part to ” via the command line.
• User-Language: Now the library context is used properly if accessing UL_SMD.roundness.
• Fixed drawing placeholder texts for packages and symbols, that contain no other objects.
• Fixed handling of larger polygons of arbitrary pad shapes in the DRC.
• Added a new ERC warning “SUPPLY pin .. without net” instead of the misleading “No pins on net ..”
• Search help in ADD dialog: Distinguishing between schematic (device search) and board (package search).
• Fixed handling multiple pads connected to the same pin if used in devices with several gates.

REQUIREMENTS

OS X 10.6 or later

ScreenShots :

Size – 46.6MB

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